In micro-bump probing, small decisions can have a big impact on yield: how much alignment margin is enough, what probe tip geometry delivers the best contact, should test happen before or after reflow, and how much bump deformation is too much?

As advanced packaging platforms such as TSMC CoWoS®, Intel® Foveros™ and EMIB, Samsung AVP, and other heterogeneous integration technologies continue to push toward finer pitches and higher interconnect densities, micro-bump probing is becoming both more critical and more challenging.

Drawing on more than a decade of production-proven micro-bump test deployment experience, this webinar will answer the questions test engineers encounter most often, from alignment requirements and contact area optimization to square versus round probe tips, force requirements, tip size selection, bump deformation limits, pre-reflow versus post-reflow testing, and probe-induced chipping concerns.

Using real-world production examples and application data, the session separates common myths from manufacturing reality and provides practical guidance for selecting probe solutions, managing contact mechanics, controlling process variables, and building robust micro-bump test strategies for next-generation AI, HPC, and advanced packaging applications.

Speaker: Alan Liao, Director, Probe BU Product Marketing, FormFactor Inc.

Speaker: Jeremy Streifer, Technical Director, Development Engineering, FormFactor Inc.

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