Teledyne Lecroy PeRT3 Phoenix System

Teledyne Lecroy PeRT3 Phoenix System

Product Overview:

  • Bit Error Rate tester with protocol aware capabilities
  • Comprehensive  jitter generation capapbility for receiver jitter and noise tolerance testing
  • Built in 3 tap de-emphasis generator
  • Protocol aware generator and receiver with 1 Gbyte space for custom patterns and protocol state machines
  • 10G option to enable full BER capabilities at 10 Gbps
  • Supports 128B/132B pattern generation and error detection
  • Supports USB3.1 loopback initialization
  • Complete jitter profile to support USB3.1jitter tolerance testing at 10Gbps
  • Built in De-emphasis generator
  • SKP filtering and injections at 10 Gbps
  • User defined test scripting functions for jitter tolerance equalization optimization search,l and multi-parameter sweep testing
  • User Customizable State Machines for protocol handshake and link training
More

The PeRT3 Phoenix fills the space between physical layer test and protocol test, providing a new and more intelligent capability for performance testing of receivers and transmitters. Designed to meet the test needs of engineers working with serial data transceivers and other high-speed serial data communication systems, the Teledyne LeCroy PeRT3 Test System is not just a new instrument, it is an entirely new instrument class.

A New Approach for New Problems

In many new generations of high speed serial I/O standards, the protocol layer optimizes physical layer properties, such as optimizing equalization settings for accurate signal transmission to the receiver through long and noisy transmission mediums. This requires a PeRT3 - a new class of instrumentation that can perform standard receiver tests and also communicate to the transmitter in protocol language. The PeRT3 therefore ensures proper operation of integrated transmitter and receiver systems, optimizes test time, and minimizes equipment and setup complexity.

What is protocol awareness

Protocol awareness combined with a BERT system allows the instrument to test the electrical characteristics of the device under test while communicating with the DUT in the protocol to enable different test modes as well as equalization training.

What is a PeRT3

PeRT3 combines all the physical layer capabilities of the stress BERT system with protocol handshake and training capabilities

Key Features
  • Bit Error Rate tester with protocol aware capabilities
  • Comprehensive jitter generation capability for receiver jitter and noise tolerance testing
  • Built in 3 tap de-emphasis generator
  • Protocol aware generator and receiver and state machines
  • User defined test scripting functions for jitter tolerance, equalization optimization search, and multi-parameter sweep testing
  • User Customizable State Machines for protocol handshake and link training

 

Generator Data Out     Generator Jitter Stress
Bit Rate 1 Gb/s to 8.5 Gb/s Random Jitter Source
Step Size 100Khz 10 Khz – 1.5Mhz RMS Jitter 1.2 – 9 pSec RMA
Rise/Fall Time (20-80%) 35 pSec typical 1.5 Mhz- 100Mhz RMA Jitter 1.2 – 12 pSec RMS
Differential Amplitude Range 50mV to 2.2V, 5mV steps 1.5 Mhz – 1000Mhz RMS Jitter 1.2 – 12 pSec RMS
Voltage Offset -2V to +2V Sinusoidal Jitter Source
Intrinsic Jitter 12 pSec pp typical with internal clock 10 Khz- 100Khz Jitter 100 – 15000 pSec
De-Emphasis   100Khz – 500Khz Jitter 100 – 2000 pSec
# taps 3 0.5 Mhz – 1000Mhz Jitter 0 – 300 pSec
Range -0.5dB to -9dB Common Mode Source
Step 0.1dB 100Mhz – 1000Mhz Jitter 50 – 350 mV
SSC Support 23Khz-33Khz   Sinusoidal waveform
  -5000ppm to +5000ppm Differential Mode Source
  Triangular/Sinusoidal waveforms 100Mhz – 2500Mhz Jitter 0 – 30 mV
Connector: K-Type female   Sinusoidal waveform
Interface Differential or single-ended, DC coupled, 50 ohm External Jitter Injection
Single error inject: Adds single error on demand Frequency range 0.5 ~ 100 Mhz
Generator Clock Out Modulation range 1 ~ 200 pSec
Clock Rate At rate divided by any integer between 1-255 Input impedance 50 ohms
Duty cycle 40-60% Amplitude range 60-600 mV
Amplitude 0.1 Vpp-Diff to 2Vpp-Diff Interface DC coupled, 50 ohms
Output voltage window -2V-2V Connector SMA female
Interface Differential or single-ended, DC coupled, 50 ohm Data In
Connector SMA female Data Rates 1 Gb/s to 8.5Gb/s
    Input impedance 50ohms
Protocol Supported Amplitude range 200 – 1800 mV
PCI Express 2.5, 5 and 8 Gb/s Clock In
SAS 1.5, 3 and 6 Gb/s Frequency range 1 Ghz to 8.5 Ghz
SATA 1.5, 3 and 6 Gb/s Termination 50 ohms
USB3.0 5Gb/s Amplitude range 600 – 1200 mV
  Tigger Out
Amplitude range 600 – 800 mV
ISI External